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wtf is altera-makefile?

patrickelectric/altera-makefile — explained in plain English

Analysis updated 2026-07-18 · repo last pushed 2016-07-28

1MakefileAudience · developerComplexity · 2/5DormantSetup · moderate

TL;DR

A Makefile that lets you build and program FPGA chips from the command line using Altera Quartus II, skipping the graphical interface entirely. It keeps your source code separate from compiler-generated files.

Mindmap

mindmap
  root((repo))
    What it does
      Automates Quartus builds
      Programs FPGA boards
      Avoids GUI entirely
    How it works
      Single Makefile config
      Separates source and temp files
      Command-line driven
    Use cases
      Automated build pipelines
      Faster workflow than GUI
      Clean project structure
    Audience
      Hardware engineers
      FPGA hobbyists
      CLI enthusiasts
    Limitations
      QSys needs manual setup
      Fixed folder structure

Code map

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Why would anyone build with this?

REASON 1

Build and compile FPGA projects from the command line without opening the Quartus GUI.

REASON 2

Program a physical FPGA board with a single command after compilation.

REASON 3

Integrate FPGA builds into an automated pipeline or continuous integration system.

REASON 4

Keep source code cleanly separated from the messy temporary files Quartus generates.

What's in the stack?

MakefileAltera Quartus II

How it stacks up

patrickelectric/altera-makefilenetbirdio/freebsd-portschmduquesne/opentopomaps-manager
Stars11
LanguageMakefileMakefileMakefile
Last pushed2016-07-282026-03-152022-04-04
MaintenanceDormantMaintainedDormant
Setup difficultymoderatemoderatemoderate
Complexity2/53/53/5
Audiencedeveloperops devopsdeveloper

Figures from each repo's GitHub metadata at analysis time.

How do you spin it up?

Difficulty · moderate Time to first run · 30min

Requires Altera Quartus II software installed and a physical FPGA board to program, also needs awareness of the QSys manual file placement limitation.

No license information is provided, so usage rights are unclear.

Wtf does this do

Altera Quartus II Makefile is a tool for people who program FPGA chips (a type of reconfigurable hardware) using Altera's Quartus II software. Normally, Quartus forces you to use a graphical interface to manage and compile your projects. This tool lets you do all of that from the command line instead, which means you can build and program your hardware projects without ever opening the GUI. The tool is essentially a configuration file (a "Makefile") that automates the heavy lifting. You organize your work into a specific folder structure: your actual hardware description code goes in one folder, and the tool puts all the temporary files and junk that Quartus generates into a separate folder. To use it, you tell the configuration file where your code is, what your project is called, and which specific hardware chip you are targeting. Then, you just run a simple command, and the system handles creating and compiling the project. Another command sends the finished code to your physical FPGA board. This is designed for hardware engineers and hobbyists who prefer typing commands over clicking through menus. For example, if you are building a custom hardware device and want to integrate the build process into an automated pipeline, or if you simply find the Quartus graphical software slow and cluttered, this tool streamlines the workflow. It keeps your source code cleanly separated from the dozens of messy files that the compiler creates. The project makes a notable tradeoff in its simplicity. Because it relies on a straightforward folder structure and a single configuration file, it keeps things lightweight and easy to understand. However, it has a known limitation: if you use a specific Quartus feature called QSys to generate custom components, you have to manually place certain files in the right folder for the build to succeed. The README doesn't go into detail on a permanent fix for this, so users just need to be aware of that extra step.

Yoink these prompts

Prompt 1
Write a Makefile wrapper that calls this Altera Quartus II Makefile to compile my FPGA project and then automatically program the board if the build succeeds.
Prompt 2
Help me set up the folder structure for this Quartus II Makefile: I have my Verilog source files in one directory and need to configure the Makefile with my project name and target FPGA chip.
Prompt 3
I'm using this Quartus II Makefile and hitting the QSys limitation where generated components need manual file placement. Walk me through exactly which files go where.
Prompt 4
Show me how to integrate this Quartus II command-line Makefile into a CI pipeline so every commit triggers an FPGA build and reports success or failure.

Frequently asked questions

wtf is altera-makefile?

A Makefile that lets you build and program FPGA chips from the command line using Altera Quartus II, skipping the graphical interface entirely. It keeps your source code separate from compiler-generated files.

What language is altera-makefile written in?

Mainly Makefile. The stack also includes Makefile, Altera Quartus II.

Is altera-makefile actively maintained?

Dormant — no commits in 2+ years (last push 2016-07-28).

What license does altera-makefile use?

No license information is provided, so usage rights are unclear.

How hard is altera-makefile to set up?

Setup difficulty is rated moderate, with roughly 30min to a first successful run.

Who is altera-makefile for?

Mainly developer.

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